The reason for this change is as previously discussed in the bread-board design notes i.e. has a separate uni-directional input and output data buses, unlike the bi-directional data bus used in the bread-board version. The main difference is that the memory used is dual-port i.e. As much as possible this version is direct copy of the bread-boarded version. Therefore, to hopefully remedy this ive redrawn them to make things easier to see. In the original design i put too much on each circuit diagram, which added a lot of visual clutter and made them tricky to read. Why? Well, i do confess the previous ISE schematics were a little on the messy side. In the being there was the simpleCPU ( Link), this evolved into simpleCPU_v1a ( Link), moved out of the FPGA and onto bread-board ( Link), to complete the circle i have taken the bread-board implementation and ported this back to FGPA.
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